The term “pipeline” denotes a digital circuit separated into a plurality of stages separated by buffers, each stage being able to execute one operation in each clock cycle. Pipelines may for example be found in processor cores or systems of interconnects. In pipelines where operations are executed in order, i.e. in the same order as that in which they are input, unused cycles pass through every stage in the pipeline between the stage where they appear and the output or outputs of the pipeline, exactly like gas bubbles propagate in a bottle of mineral water. In the following, such unused cycles in the pipeline will simply be called “bubbles”. For example, in the case of a processor core, these bubbles may appear because of fetch-miss defects, nop (no operation) instructions, or branching instructions such as skip addressing.
An operation is said to be “valid” if the result of its execution has an effect on the result of a task or a program that must be executed by a pipeline system.
The term “test vector” is used to indicated the state of a buffer at the input of a pipeline stage during the test phase.
In circuits produced in micro and nanotechnology, faults resulting from physical defects due to aging may cause operating errors and eventually failure of the system. In addition, the extreme miniaturization of these circuits decreases the amount of electric charge required to change the logic level of a signal, thereby implicitly promoting the appearance of transient faults.
In digital systems produced using nanoscale technologies, current approaches that allow aging to be monitored are too costly in terms of footprint and power, or else they have a limited degree of coverage with respect to aging-related faults.
In general, most aging-related defects have the property of leading to a gradual increase in the latency of the circuit. Therefore, these defects will induce timing faults, the severity of which will gradually increase over time. It is this property that will be used to greatly decrease the latency of detection, and even enable aging-related faults to be detected and predicted.
Patent application US 2005/172172 describes a method and a device for testing pipeline systems in a microprocessor during unused cycles. The method compares a known pre-stored value with the output of the pipeline under test in order to determine if errors are present.
Patent application US 2009/138772 describes a method and a device for testing microprocessors, which also uses cycles that are unused during the operation of the microprocessors. The method uses a predefined logic value.